Job Description

The application window is expected to close on: 8/15/25.

Job posting may be removed earlier if the position is filled or a sufficient number of applications are received

Meet the Team

Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G and 1T bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks. This role sits on our ASIC team providing infrastructure support for RTL implementation to gates.

Your Impact

You will collaborate with Acacia’s ASIC and Hardware teams in the engineering organization to deliver tape-out quality physical designs.

You will work closely with RTL designers to debug and root-cause physical implementation issues related to design, tools, etc. and arrive at a feasible solution through the augmentation of input and design collateral.

You will work closely with Back-end team on timing signoff for seamless physical design closure.

You will work with the ASIC physical design team to enhance and continuously improve the physical design implementation flow.

Acacia takes pride in providing and fostering a collaborate environment in order ensure success and personal growth.

Minimum Qualifications:

• BS in Electronics/Electrical Engineering or equivalent with 7+ years, Masters with 4+ years, or PhD with +1 years of experience in the telecommunications industry
• 7 years of professional engineering experience, including experience in advanced technology nodes: 7nm/5nm/3nm and below
• Experience with flow support and development. Scripting experience with TCL, Python, Perl, Make
• Experience with industry standard CAD methodologies from Cadence, Synopsys and/or Mentor
• Experience with floor planning & partitioning, synthesis, place & route, static timing analysis (STA), formal equivalence check, Clock Tree Synthesis, timing closure, signal integrity, physical verification DRC/LVS
• Experience Executing ASICs from product definition to production release

Preferred Qualifications:

• Experience with power analysis, electromigration, IR signoff, process corner decisions, power grid analysis.
• Experience managing stakeholders across analog and digital teams while interfacing with EDA vendors on issues/features/enhancements.
• Experience presenting technical information to both technical and non-technical audiences.
• Experience initiating task without supervision.

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Simply put – we power the future.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

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